Through silicon via (TSV) technology is developed to achieve a 3-dimensional package of a semiconductor chip. Currently, the through silicon via technology is mainly applied to package a memory semiconductor chip. A number of memory dies manufactured by the same process and the same standard are stacked together by using the through silicon via technology. However, in a traditional method of forming the through silicon via, it is necessary to perform a thinning process to greatly reduce a thickness of the silicon substrate where an integrated circuit has been formed. For example, the thickness of the silicon substrate is reduced from 800 micrometers to 50 micrometers. The thinning process of the silicon substrate is difficult and is prone to damage the integrated circuit on the silicon substrate. In addition, if the memory dies are manufactured by the different processes and the different standards, the memory dies will have different sizes. Thus, it is difficult to stack the memory dies with different sizes by using the through silicon via technology.
Therefore, what is needed is a semiconductor chip package structure and a semiconductor chip for the semiconductor chip package structure to overcome the above disadvantages.